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ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 1 of 13 ap2014/a www.diodes.com ? diodes incorporated ? synchronous pwm dc-dc controller in an 8-pin package ? operating with single 5v or 12v supply voltage ? internal 200khz oscillator (400khz for ap2014a) ? soft-start function ? fixed frequency voltage mode ? 500ma peak output drive capability ? output protected when control fet is shorted ? sop-8l pb-free, and sop-8l green (under development) packages the ap2014 pwm dc-dc controller ic is designed to provide a low cost synchronous buck regulator for on-board dc to dc converter applications. with the migration of today?s asic products requiring low supply voltages such as 1.8v and lower, together with currents in excess of 3a, traditional linear regulators are simply too lossy to be used when input supply is 5v or even in some cases with 3.3v input supply. the ap2014 together with dual n-channel mosfets such as af9410, provide a low cost solution for such applications. th is device features an internal 200khz oscillator (400khz for "a" version), under-voltage lockout for both vcc and vc supplies, an external programmable soft-start function as well as output under-voltage detection that latches off the device when an output short is detected. ? graphic card ? hard disk drive ? ddr memory source sink vtt application ? low cost on-board dc to dc such as 5v to 3.3v, 2.5v or 1.8v sop-8l 1 2 3 45 6 7 8 (top view) vcc gnd ap2014/a ldrv hdrv vc comp fb ss features general description applications pin assignments
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 2 of 13 ap2014/a www.diodes.com ? diodes incorporated ordering information ap 2014a x x x package packing sm: sop-8l blank : tube or bulk -7/-13 : taping lead-free blank : lead-free g : green frequency blank : 200khz a : 400khz pin descriptions pin name pin no. description fb 1 this pin is connected directly to the output of the switching regulator via resistor divider to provide feedback to the error amplifier. vcc 2 this pin provides biasing for the internal bloc ks of the ic as well as power for the low side driver. a minimum of 1uf, high frequency capacitor must be connected from this pin to ground to provide peak dr ive current capability. ldrv 3 output driver for the synchronous power mosfet. gnd 4 this pin serves as the ground pin and must be connected directly to the ground plane. a high frequency capacitor (0.1 to 1uf) must be connected from v5 and v12 pins to this pin for noise free operation. hdrv 5 output driver for the high side power mosfet. vc 6 this pin is connected to a voltage that must be at least 4v higher than the bus voltage of the switcher (assuming 5v threshold mosfet) and powers the high side output driver. a minimum of 1uf, high frequency capacitor must be connected from this pin to ground to provide peak drive current capability. comp 7 compensation pin of the error amplifier. an external resistor and capacitor network is typically connected from this pin to ground to provide loop compensation. ss 8 this pin provides soft-start for the switching re gulator. an internal current source charges an external capacitor that is connected from this pin to ground which ramps up the output of the switching regulator, preventing it from over shooting as well as limiting the input current. the converter can be shutdown by pulling this pin below 0.5v. 7? tape and reel 13? tape and reel device package code packaging quantity part number suffix quantity part number suffix ap2014sm sm sop-8l 3000/tape & reel -7 10,000/tape & reel -13 ap2014asm sm sop-8l 3000/tape & reel -7 10,000/tape & reel -13
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 3 of 13 ap2014/a www.diodes.com ? diodes incorporated block diagram ss fb comp gnd ldrv vcc hdrv vc 25k 25k 1.25v por 20ua 64ua max 3v error amp + - oscillator ct error comp + - s r q reset dom 4 3 2 5 6 7 1 8 + - + - bias generator vcc 4.0v vc 3.5v 0.2v 0.2v 3v 1.25v por + - fblo comp 0.5v por absolute maximum ratings symbol parameter range. unit v cc vcc supply voltage 20 v v c vc supply voltage (not rated for inductive load) 32 v t st storage temperature range -65 to 150 o c t j operating junction temperature range 0 to 125 o c jc thermal resistance junction to case 90 o c/w ja thermal resistance junction to ambient 250 o c/w
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 4 of 13 ap2014/a www.diodes.com ? diodes incorporated electrical characteristics unless otherwise specified, thes e specifications apply over v cc =5v, v c =12v and t a =0 to 70c. typical values refer to t a =25c. low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. symbol parameter conditions min. typ. max. unit reference voltage ap2014 1.225 1.25 1.275 v fb fb voltage ap2014a 0.784 0.8 0.816 v l reg fb voltage line regulation 5 < vcc < 12 - 0.2 0.35 % uvlo uvlo threshold - v cc 4.0 4.2 4.4 v uvlo v cc uvlo hysteresis - v cc supply ramping up - 0.25 - v uvlo threshold - v c 3.1 3.3 3.5 v uvlo v c uvlo hysteresis - v c supply ramping up - 0.2 - v fb ramping down (ap2014) 0.4 0.6 0.8 v uvlo threshold - fb fb ramping down (ap2014a) 0.3 0.4 0.5 v uvlo fb uvlo hysteresis - fb - 0.1 - v supply current operation i cc v cc operation supply current freq=200khz, c l =1500pf - 7 10 ma operation i c v c operation supply current freq=200khz, c l =1500pf - 7 10 ma i ccq v cc static supply current ss=0v - 3.3 6 ma i cq v c static supply current ss=0v - 1 4.5 ma soft-start section ss ib charge current ss=0v 10 20 30 a error amp i fb1 fb voltage input bias current ss=3v, fb=1v - -0.1 - a i fb2 fb voltage input bias curr ent ss=0v, fb=1v - -64 - a gm transconductance 450 600 750 mho oscillator ap2014 170 200 230 khz freq frequency ap2014a 340 400 460 khz v ramp ramp-amplitude voltage 1.225 1.25 1.275 v output drivers t r rise time c l =1500pf - 50 100 ns t f fall time c l =1500pf - 50 100 ns t db dead band time 50 150 250 ns t on max duty cycle fb=1v, freq=200khz 85 90 95 % t off min duty cycle fb=1.5v 0 0 - %
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 5 of 13 ap2014/a www.diodes.com ? diodes incorporated function description introduction the ap2014 is a fixed frequency, voltage mode synchronous controller and consists of a prec ision reference voltage, an error amplifier, an internal oscillator, a pwm comparator, 0.5a peak gate driver, soft-start and shutdown circuits (see block diagram). the output voltage of the synchronous converter is set and controlled by the output of the error amplifier; this is the amplified error signal from the sensed output voltage and the reference voltage. this voltage is compared to a fixed frequency linear sawtooth ramp and generates fixed frequency pulses of variable duty-cycle, which drives the two n-channel ex ternal mosfets.the timing of the ic is provided through an inter nal oscillator circuit which uses on-chip capacitor to set the oscillation frequency to 200 khz (400 khz for ?a? version). soft-start the ap2014 has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. to ensure correct start-up, the soft-start sequence initiates when the v c and v cc rise above their threshold (3 .3v and 4.2v respectively) and generates the power on reset (por ) signal. soft-start function operates by sourcing an internal current to charge an external capacitor to about 3v. initially, the soft-start function clamps the e/a?s output of the pwm converter. as the charging voltage of the external capacitor ramps up, the pwm signals increase from zero to the point the feedback loop takes control. the outputs are protected against the short circuit. the ap2014 protects the circuit for short ed output by sensing the output voltage (through the external resistor divider). the ap2014 shuts down the pwm signals, when the output voltage drops below 0.6v (0.4v for ap2014a). the ap2014 also protects the output from over-voltaging when the control fet is shorted. this is done by turning on the sync fet with the maximum duty cycle. under-voltage lockout the under-voltage lockout circuit assures that the mosfet driver outputs remain in the off state whenever the supply voltage drops below set parameters. lockout occurs if v c and v cc fall below 3.3v and 4.2v respectively. normal operation resumes once v c and v cc rise above the set values. ic quiescent power dissipation power dissipation for pwm dc-dc c ontroller ic is a function of applied voltage, gate driver loads and switching frequency. the ic's maximum power dissipation occurs when the ic operating with single 12v supply voltage (vcc=12v and vc ? 24v) at 400khz switching frequency and maximum gate loads. page 8 show voltage vs. current, when the gate drivers loaded with 1500pf capacitors. the ic's power dissipation results to an excessive temperature rise. this s hould be considered when using ap2014a for such application.
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 6 of 13 ap2014/a www.diodes.com ? diodes incorporated typical application circuit (1) c6 10nf q2 af9410n c17 0.1u vin=5v c3 1u c12 470u vc=12v c8 470u vout +1.5v/7.0a q1 af9410n l1 5.6u/9.0 r6 22k ap2014 c13 470u c20 100p c5 0.47u r3 8.2 c4 0.1u r2 3.3k c11 0.1u r1 820 u1 1 2 3 45 6 7 8 fb vcc ldrv gnd hdrv vc comp ss (2) vout +1.5v/7.0a c5 0.47u r3 8.2 c13 470u c1 0.1uf c8 470u d1 1n4148 r2 3.3k c11 0.1u u1 ap2014 1 2 3 4 5 6 7 8 fb vcc ldrv gnd hdrv vc comp ss c12 470u r1 820 q1 af9410n r6 6.8k vin=12v c20 100p option c4 0.1u c6 10nf q2 af9410n c17 0.1u 1n4148 d2 c3 100u l1 5.6u/9a single supply 12v input
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 7 of 13 ap2014/a www.diodes.com ? diodes incorporated typical application circuit (continued) (3) vout +5v/5.0a c5 0.47u r3 8.2 c13 470u c1 0.1uf c8 470u d1 1n4148 r2 3k c11 0.1u u1 ap2014 1 2 3 4 5 6 7 8 fb vcc ldrv gnd hdrv vc comp ss r1 10k q1 af4910n-1 r6 39k vin=12v c20 100p c4 0.1u c6 10nf q2 af4910n-2 c17 0.1u 1n4148 d2 c3 100u l1 10uh/6a single supply 12v input (4) vout +5v/4.0a c5 0.47u r3 8.2 c13 470u c1 0.1uf c8 470u d1 1n4148 r2 3.3k c11 0.1u u1 ap2014 1 2 3 4 5 6 7 8 fb vcc ldrv gnd hdrv vc comp ss r1 10k q1-1 af4928n-1 r6 47k vin=24v c20 100p c4 0.1u c6 10nf q1-2 af4928n-2 c17 0.1u 1n4148 d2 c3 100u l1 10uh/6a 1.2k rzd r3 8.2 zd 6.2v i zd ( R 15ma)=(vin-v d2 -v zd )/rzd single supply 24v input
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 8 of 13 ap2014/a www.diodes.com ? diodes incorporated typical application circuit (continued) (5) dual supply, 5v bus and 12v bias input ss fb comp gnd ldrv vcc hdrv vc + + + ap2014 c7 0.1uf c8 10nf r1 3.3k r2 1k r3 1k q1 q2 af9410 l2 10uh c3 100uf l1 1uh c4 47uf 1.8v/1a 2.5v/2a c6 c1 0.1uf ap1187 + 5v 12v ss fb comp gnd ldrv vcc hdrv vc + + ap2014 c13 0.1uf c14 10nf r4 3.3k r5 1k r6 1.65k q3 af9410 q4 af9410 l3 c11 3.3v/1.8a c12 220uf c9 0.1uf c1 1uf c5 47uf c10 1uf 10uh af9410 220uf dual supply, 5v bus and 12v bias input
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 9 of 13 ap2014/a www.diodes.com ? diodes incorporated typical performance characteristics load regulation 0.0% 0.2% 0.4% 0.6% 0.8% 1.0% 1.2% 1.4% 1.6% 1.8% 2.0% 0.0 0.5 1.0 3.0 5.0 8.0 10.0 12.0 15.0 iout(a) load regulation (%) efficiency vs. iout 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 0.0 0.5 1.0 3.0 5.0 8.0 10.0 12.0 15.0 iout(a) efficiency (%) line regulation 1.240 1.245 1.250 1.255 1.260 4.5 5.0 7.0 9.0 11.0 12.0 15.0 vi n (v) feedback voltage (v) line regulation 2.500 2.505 2.510 2.515 2.520 2.525 2.530 4.5 5.0 7.0 9.0 11.0 12.0 15.0 vin(v) output voltage (v) frequency v.s. vin 175.0 180.0 185.0 190.0 195.0 200.0 205.0 210.0 4.5 5.0 7.0 9.0 11.0 12.0 15.0 vin(v) frequency (khz) frequency v.s. temperature 150.0 160.0 170.0 180.0 190.0 200.0 210.0 220.0 230.0 240.0 -40 -20 0 25 50 75 100 125 temperature ( o c) frequency (khz)
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 10 of 13 ap2014/a www.diodes.com ? diodes incorporated typical performance characteristics (continued) icc and iccq vs. vin 3.00 5.00 7.00 9.00 11.00 13.00 15.00 4.5 5 7 9 11 12 15 vin(v) icc and iccq (ma) icc(ma) iccq(ma) ic and icq vs. vin 2.00 4.00 6.00 8.00 10.00 12.00 14.00 16.00 4.5 5 7 9 11 12 15 vin(v) ic and icq (ma) ic(ma) icq(ma) icc and ic vs. temperature 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 -40 -20 0 25 50 75 100 125 temperature ( o c) icc and ic (ma) icc(ma) ic(ma) vfb vs. temperature 1.20 1.22 1.24 1.26 1.28 1.30 -40 -20 0 25 50 75 100 125 temperature ( o c) feedback voltage (v) ap2014a ic and icc vs vc 3.0 5.0 7.0 9.0 11.0 13.0 15.0 17.0 19.0 21.0 6 8 10 12 14 16 18 20 22 24 vc(v) ic ( ma ) icc(ma) ap2014 ic and icc vs vc 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 6 8 10 12 14 16 18 20 22 24 vc(v) ic ( ma ) icc(ma)
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 11 of 13 ap2014/a www.diodes.com ? diodes incorporated typical performance characteristics (continued) vout ripple vcc=5v; vc=12v; vout=2.5v iout=0.5a, vripple=30.8mv vout ripple vcc=5v; vc=12v; vout=2.5v iout=5a, vripple=33.2mv dead time v.s. iout vcc=5v, vc=12v, vout=2.5v, iout=0.5a, temp=28 o c dead time = 150ns dead time = 150ns dead time v.s. iout vcc=5v, vc=12v, vout=2.5v, iout=5a , temp=28 o c dead time = 160ns dead time = 150ns highside gate lowside gate phase lowside gate highside gate phase
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 12 of 13 ap2014/a www.diodes.com ? diodes incorporated (1) sop-8l ap2014(a) (top view) y ww part number logo ww: nth week y: year x blank : lead free g : green marking code table device package marking code date code ap2014 sop-8l ap2014 yww ap2014a sop-8l ap2014a yww date code key year 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 code t u v w x y z a b c d e marking information
ap2014/a synchronous pwm dc-dc buck controller ds30883 rev. 1 - 0 13 of 13 ap2014/a www.diodes.com ? diodes incorporated package information (all dimensions in mm) package type: sop-8l 3.85/3.95 typ 3.90 3.80/3.90 typ 3.85 7 4 5 0.60/0.70 typ 0.65 0.15/0.25 typ 0.20 0 . 6 0 / 0 . 8 0 t y p 0 . 7 0 1.27 4.85/4.95 typ 4.90 1.40/1.50 typ 1.45 0.30/0.50 typ 0.40 5.90/6.10 typ 6.00 5 4 1 8 0.08/0.25 typ 0.15 r 0 . 1 ( a l l s i d e ) 9 4 3 0.35 recommended land pattern 8x 2.2 5.2 6x 1.27 8x .6

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